diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 76e07f3..1791b97 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -145,7 +145,6 @@
 #define L1_CACHE_SHIFT		6
 #define L1_CACHE_BYTES		BIT(L1_CACHE_SHIFT)
 #endif
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER	2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS		{ 1, 1, 1, 1, 4, 4, 4, 4 }
 #define CONFIG_SYS_FSL_NUM_CC_PLLS		4
 
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 2ac6b87..18ef718 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1173,8 +1173,16 @@
 		Number of local access windows. This is fixed per SoC.
 		If not sure, do not change.
 
+config SYS_FSL_CORES_PER_CLUSTER
+	int
+	depends on SYS_FSL_QORIQ_CHASSIS2
+	default 4 if ARCH_B4860 || ARCH_T2080 || ARCH_T4240
+	default 2 if ARCH_B4420
+	default 1 if ARCH_T1024 || ARCH_T1040 || ARCH_T1042
+
 config SYS_FSL_THREADS_PER_CORE
 	int
+	depends on SYS_FSL_QORIQ_CHASSIS2
 	default 2 if E6500
 	default 1
 
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index d9909f5..458c0a8 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -153,7 +153,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
 #elif defined(CONFIG_ARCH_T4240)
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #ifdef CONFIG_ARCH_T4240
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 4 }
@@ -201,7 +200,6 @@
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 #ifdef CONFIG_ARCH_B4860
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_MAX_DSP_CPUS		12
 #define CONFIG_NUM_DSP_CPUS		6
 #define CONFIG_SYS_FSL_SRDS_NUM_PLLS	2
@@ -215,14 +213,12 @@
 #else
 #define CONFIG_MAX_DSP_CPUS		2
 #define CONFIG_SYS_FSL_SRDS_NUM_PLLS	1
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS	{ 1, 4 }
 #define CONFIG_SYS_NUM_FM1_DTSEC	4
 #define CONFIG_SYS_NUM_FM1_10GEC	0
 #endif
 
 #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 1, 1 }
@@ -246,7 +242,6 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_T1024)
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3	 /* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLL	2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 1, 1, 1 }
@@ -270,7 +265,6 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN		1